Staggered Core Activation: A circuit/architectural approach for mitigating resonant supply noise issues in multi-core multi-power domain processors

Ayan Paul, Matt Amrein, Saket Gupta, Arvind Vinod, Abhishek Arun, Sachin S. Sapatnekar, Chris H. Kim. Staggered Core Activation: A circuit/architectural approach for mitigating resonant supply noise issues in multi-core multi-power domain processors. In Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, CICC 2012, San Jose, CA, USA, September 9-12, 2012. pages 1-4, IEEE, 2012. [doi]

Authors

Ayan Paul

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Matt Amrein

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Saket Gupta

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Arvind Vinod

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Abhishek Arun

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Sachin S. Sapatnekar

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Chris H. Kim

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