Gopal Paul, Rohit Reddy, Chittaranjan A. Mandal, Bhargab B. Bhattacharya. A BDD-Based Design of an Area-Power Efficient Asynchronous Adder. In IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2010, 5-7 July 2010, Lixouri Kefalonia, Greece. pages 29-34, IEEE Computer Society, 2010. [doi]
Abstract is missing.