A 5.3GHz digital-to-time-converter-based fractional-N all-digital PLL

Nenad Pavlovic, Jos Bergervoet. A 5.3GHz digital-to-time-converter-based fractional-N all-digital PLL. In IEEE International Solid-State Circuits Conference, ISSCC 2011, Digest of Technical Papers, San Francisco, CA, USA, 20-24 February, 2011. pages 54-56, IEEE, 2011. [doi]

Abstract

Abstract is missing.