A Nonlinear Analytical Optimization Method for Standard Cell Placement of VLSI Circuits

Sameer Pawanekar, Gaurav Trivedi, Kalpesh Kapoor. A Nonlinear Analytical Optimization Method for Standard Cell Placement of VLSI Circuits. In 28th International Conference on VLSI Design, VLSID 2015, Bangalore, India, January 3-7, 2015. pages 423-428, IEEE Computer Society, 2015. [doi]

@inproceedings{PawanekarTK15,
  title = {A Nonlinear Analytical Optimization Method for Standard Cell Placement of VLSI Circuits},
  author = {Sameer Pawanekar and Gaurav Trivedi and Kalpesh Kapoor},
  year = {2015},
  doi = {10.1109/VLSID.2015.77},
  url = {http://doi.ieeecomputersociety.org/10.1109/VLSID.2015.77},
  researchr = {https://researchr.org/publication/PawanekarTK15},
  cites = {0},
  citedby = {0},
  pages = {423-428},
  booktitle = {28th International Conference on VLSI Design, VLSID 2015, Bangalore, India, January 3-7, 2015},
  publisher = {IEEE Computer Society},
  isbn = {978-1-4799-6658-5},
}