Martin J. Pearson, Chris Melhuish, Anthony G. Pipe, Mokhtar Nibouche, Ian Gilhespy, Kevin N. Gurney, Benjamin Mitchinson. Design and FPGA Implementation of an Embedded Real-Time Biologically Plausible Spiking Neural Network Processor. In Tero Rissa, Steven J. E. Wilton, Philip Heng Wai Leong, editors, Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), Tampere, Finland, August 24-26, 2005. pages 582-585, IEEE, 2005.
@inproceedings{PearsonMPNGGM05,
title = {Design and FPGA Implementation of an Embedded Real-Time Biologically Plausible Spiking Neural Network Processor},
author = {Martin J. Pearson and Chris Melhuish and Anthony G. Pipe and Mokhtar Nibouche and Ian Gilhespy and Kevin N. Gurney and Benjamin Mitchinson},
year = {2005},
tags = {design},
researchr = {https://researchr.org/publication/PearsonMPNGGM05},
cites = {0},
citedby = {0},
pages = {582-585},
booktitle = {Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), Tampere, Finland, August 24-26, 2005},
editor = {Tero Rissa and Steven J. E. Wilton and Philip Heng Wai Leong},
publisher = {IEEE},
isbn = {0-7803-9362-7},
}