An on-chip clock generation scheme for faster-than-at-speed delay testing

Songwei Pei, Huawei Li, Xiaowei Li. An on-chip clock generation scheme for faster-than-at-speed delay testing. In Design, Automation and Test in Europe, DATE 2010, Dresden, Germany, March 8-12, 2010. pages 1353-1356, IEEE, 2010. [doi]

@inproceedings{PeiLL10,
  title = {An on-chip clock generation scheme for faster-than-at-speed delay testing},
  author = {Songwei Pei and Huawei Li and Xiaowei Li},
  year = {2010},
  url = {http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5457020},
  tags = {testing},
  researchr = {https://researchr.org/publication/PeiLL10},
  cites = {0},
  citedby = {0},
  pages = {1353-1356},
  booktitle = {Design, Automation and Test in Europe, DATE 2010, Dresden, Germany, March 8-12, 2010},
  publisher = {IEEE},
}