A low-overhead RO PUF design for Xilinx FPGAs

Songwei Pei, Jingdong Zhang, Ruonan Wang. A low-overhead RO PUF design for Xilinx FPGAs. IEICE Electronic Express, 15(5):20180093, 2018. [doi]

References

No references recorded for this publication.

Cited by

No citations of this publication recorded.