High linearity transimpedance amplifier in 0.18-μm CMOS technology for 20-Gb/s PAM-4 receivers

Chih-Chen Peng, Jau-Ji Jou, Tien-Tsorng Shih, Chien-Liang Chiu. High linearity transimpedance amplifier in 0.18-μm CMOS technology for 20-Gb/s PAM-4 receivers. In International SoC Design Conference, ISOCC 2017, Seoul, Korea (South), November 5-8, 2017. pages 182-183, IEEE, 2017. [doi]

Authors

Chih-Chen Peng

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Jau-Ji Jou

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Tien-Tsorng Shih

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Chien-Liang Chiu

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