Fast Low-Power 64-Bit Modular Hybrid Adder

Stefania Perri, Pasquale Corsonello, Giuseppe Cocorullo. Fast Low-Power 64-Bit Modular Hybrid Adder. In Vassilis Paliouras, Johan Vounckx, Diederik Verkest, editors, Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings. Volume 3728 of Lecture Notes in Computer Science, pages 609-617, Springer, 2005. [doi]

Abstract

Abstract is missing.