Modeling on-chip variations in digital circuits using statistical timing analysis

Gor Petrosyan, Sargis Abovyan, Tigran Harutyunyan. Modeling on-chip variations in digital circuits using statistical timing analysis. In 2010 East-West Design & Test Symposium, EWDTS 2010, St. Petersburg, Russia, September 17-20, 2010. pages 37-39, IEEE, 2010. [doi]

Abstract

Abstract is missing.