B. J. Phillips, N. Burgess. Implementing 1, 024-Bit RSA Exponentiation on a 32-Bit Processor Core. In 12th IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP 2000), 10-12 July 2000, Boston, MA, USA. pages 127-137, IEEE Computer Society, 2000. [doi]
Abstract is missing.