Stanislaw J. Piestrak. Design of cost-efficient multipliers modulo 2:::a:::-1. In International Symposium on Circuits and Systems (ISCAS 2010), May 30 - June 2, 2010, Paris, France. pages 4093-4096, IEEE, 2010. [doi]
@inproceedings{Piestrak10-0,
title = {Design of cost-efficient multipliers modulo 2:::a:::-1},
author = {Stanislaw J. Piestrak},
year = {2010},
doi = {10.1109/ISCAS.2010.5537626},
url = {http://dx.doi.org/10.1109/ISCAS.2010.5537626},
tags = {design},
researchr = {https://researchr.org/publication/Piestrak10-0},
cites = {0},
citedby = {0},
pages = {4093-4096},
booktitle = {International Symposium on Circuits and Systems (ISCAS 2010), May 30 - June 2, 2010, Paris, France},
publisher = {IEEE},
}