A Low Power Approach to Floating Point Adder Design for DSP Applications

R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili, S. Y. A. Shah. A Low Power Approach to Floating Point Adder Design for DSP Applications. VLSI Signal Processing, 27(3):195-213, 2001. [doi]

Authors

R. V. K. Pillai

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Dhamin Al-Khalili

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Asim J. Al-Khalili

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S. Y. A. Shah

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