Built-In Generation of Weighted Test Sequences for Synchronous Sequential Circuits

Irith Pomeranz, Sudhakar M. Reddy. Built-In Generation of Weighted Test Sequences for Synchronous Sequential Circuits. In 2000 Design, Automation and Test in Europe (DATE 2000), 27-30 March 2000, Paris, France. pages 298-304, IEEE Computer Society, 2000. [doi]

Abstract

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