Aliasing computation using fault simulation with fault dropping

Irith Pomeranz, Sudhakar M. Reddy. Aliasing computation using fault simulation with fault dropping. In 11th IEEE VLSI Test Symposium (VTS'93), 6 Apr 1993-8 Apr 1993, Atlantic City, NJ, USA. pages 282-288, IEEE, 1993. [doi]

@inproceedings{PomeranzR93-0,
  title = {Aliasing computation using fault simulation with fault dropping},
  author = {Irith Pomeranz and Sudhakar M. Reddy},
  year = {1993},
  doi = {10.1109/VTEST.1993.313358},
  url = {http://dx.doi.org/10.1109/VTEST.1993.313358},
  researchr = {https://researchr.org/publication/PomeranzR93-0},
  cites = {0},
  citedby = {0},
  pages = {282-288},
  booktitle = {11th IEEE VLSI Test Symposium (VTS'93), 6 Apr 1993-8 Apr 1993, Atlantic City, NJ, USA},
  publisher = {IEEE},
  isbn = {0-8186-3830-3},
}