Irith Pomeranz, Sudhakar M. Reddy. Test Compaction for Synchronous Sequential Circuits by Test Sequence Recycling. In 8th Great Lakes Symposium on VLSI (GLS-VLSI 98), 19-21 February 1998, Lafayette, LA, USA. pages 216-221, IEEE Computer Society, 1998. [doi]
@inproceedings{PomeranzR98:5,
title = {Test Compaction for Synchronous Sequential Circuits by Test Sequence Recycling},
author = {Irith Pomeranz and Sudhakar M. Reddy},
year = {1998},
url = {http://csdl.computer.org/comp/proceedings/glsvlsi/1998/8409/00/84090216abs.htm},
tags = {testing},
researchr = {https://researchr.org/publication/PomeranzR98%3A5},
cites = {0},
citedby = {0},
pages = {216-221},
booktitle = {8th Great Lakes Symposium on VLSI (GLS-VLSI 98), 19-21 February 1998, Lafayette, LA, USA},
publisher = {IEEE Computer Society},
isbn = {0-8186-8409-7},
}