Bill Pontikakis, Hung Tien Bui, François R. Boyer, Yvon Savaria. A Low-Complexity High-Speed Clock Generator for Dynamic Frequency Scaling of FPGA and Standard-Cell Based Designs. In International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA. pages 633-636, IEEE, 2007. [doi]
@inproceedings{PontikakisBBS07, title = {A Low-Complexity High-Speed Clock Generator for Dynamic Frequency Scaling of FPGA and Standard-Cell Based Designs}, author = {Bill Pontikakis and Hung Tien Bui and François R. Boyer and Yvon Savaria}, year = {2007}, doi = {10.1109/ISCAS.2007.378817}, url = {http://doi.ieeecomputersociety.org/10.1109/ISCAS.2007.378817}, tags = {rule-based}, researchr = {https://researchr.org/publication/PontikakisBBS07}, cites = {0}, citedby = {0}, pages = {633-636}, booktitle = {International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA}, publisher = {IEEE}, }