Transistor-level optimization of CMOS complex gates

Vinicius N. Possani, Felipe S. Marques, Leomar S. da Rosa Jr., Vinicius Callegaro, André Inácio Reis, Renato P. Ribas. Transistor-level optimization of CMOS complex gates. In 4th IEEE Latin American Symposium on Circuits and Systems, LASCAS 2013, Cusco, Peru, February 27 - March 1, 2013. pages 1-4, IEEE, 2013. [doi]

Authors

Vinicius N. Possani

This author has not been identified. Look up 'Vinicius N. Possani' in Google

Felipe S. Marques

This author has not been identified. Look up 'Felipe S. Marques' in Google

Leomar S. da Rosa Jr.

This author has not been identified. Look up 'Leomar S. da Rosa Jr.' in Google

Vinicius Callegaro

This author has not been identified. Look up 'Vinicius Callegaro' in Google

André Inácio Reis

This author has not been identified. Look up 'André Inácio Reis' in Google

Renato P. Ribas

This author has not been identified. Look up 'Renato P. Ribas' in Google