Transistor-level optimization of CMOS complex gates

Vinicius N. Possani, Felipe S. Marques, Leomar S. da Rosa Jr., Vinicius Callegaro, André Inácio Reis, Renato P. Ribas. Transistor-level optimization of CMOS complex gates. In 4th IEEE Latin American Symposium on Circuits and Systems, LASCAS 2013, Cusco, Peru, February 27 - March 1, 2013. pages 1-4, IEEE, 2013. [doi]

@inproceedings{PossaniMRCRR13,
  title = {Transistor-level optimization of CMOS complex gates},
  author = {Vinicius N. Possani and Felipe S. Marques and Leomar S. da Rosa Jr. and Vinicius Callegaro and André Inácio Reis and Renato P. Ribas},
  year = {2013},
  doi = {10.1109/LASCAS.2013.6519029},
  url = {https://doi.org/10.1109/LASCAS.2013.6519029},
  researchr = {https://researchr.org/publication/PossaniMRCRR13},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {4th IEEE Latin American Symposium on Circuits and Systems, LASCAS 2013, Cusco, Peru, February 27 - March 1, 2013},
  publisher = {IEEE},
  isbn = {978-1-4673-4897-3},
}