A 100mW 9.6Gb/s Transceiver in 90nm CMOS for Next-Generation Memory Interfaces

E. Prete, D. Scheideler, A. Sanders. A 100mW 9.6Gb/s Transceiver in 90nm CMOS for Next-Generation Memory Interfaces. In 2006 IEEE International Solid State Circuits Conference, ISSCC 2006, Digest of Technical Papers, an Francisco, CA, USA, February 6-9, 2006. pages 253-262, IEEE, 2006. [doi]

Authors

E. Prete

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D. Scheideler

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A. Sanders

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