SI-SMART: Functional test generation for RTL circuits using loop abstraction and learning recurrence relationships

Prateek Puri, Michael S. Hsiao. SI-SMART: Functional test generation for RTL circuits using loop abstraction and learning recurrence relationships. In 33rd IEEE International Conference on Computer Design, ICCD 2015, New York City, NY, USA, October 18-21, 2015. pages 38-45, IEEE Computer Society, 2015. [doi]

@inproceedings{PuriH15-0,
  title = {SI-SMART: Functional test generation for RTL circuits using loop abstraction and learning recurrence relationships},
  author = {Prateek Puri and Michael S. Hsiao},
  year = {2015},
  doi = {10.1109/ICCD.2015.7357082},
  url = {http://doi.ieeecomputersociety.org/10.1109/ICCD.2015.7357082},
  researchr = {https://researchr.org/publication/PuriH15-0},
  cites = {0},
  citedby = {0},
  pages = {38-45},
  booktitle = {33rd IEEE International Conference on Computer Design, ICCD 2015, New York City, NY, USA, October 18-21, 2015},
  publisher = {IEEE Computer Society},
  isbn = {978-1-4673-7166-7},
}