Scalability of 3D-Integrated Arithmetic Units in High-Performance Microprocessors

Kiran Puttaswamy, Gabriel H. Loh. Scalability of 3D-Integrated Arithmetic Units in High-Performance Microprocessors. In Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 2007. pages 622-625, IEEE, 2007. [doi]

@inproceedings{PuttaswamyL07,
  title = {Scalability of 3D-Integrated Arithmetic Units in High-Performance Microprocessors},
  author = {Kiran Puttaswamy and Gabriel H. Loh},
  year = {2007},
  doi = {10.1109/DAC.2007.375238},
  url = {http://doi.ieeecomputersociety.org/10.1109/DAC.2007.375238},
  researchr = {https://researchr.org/publication/PuttaswamyL07},
  cites = {0},
  citedby = {0},
  pages = {622-625},
  booktitle = {Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 2007},
  publisher = {IEEE},
}