Yield Modeling of a WSI Telecom Router Architecture

Bing Qiu, Yvon Savaria, Meng Lu, Chunyan Wang, Claude Thibeault. Yield Modeling of a WSI Telecom Router Architecture. In 17th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2002), 6-8 November 2002, Vancouver, BC, Canada, Proceedings. pages 314-324, IEEE Computer Society, 2002. [doi]

@inproceedings{QiuSLWT02,
  title = {Yield Modeling of a WSI Telecom Router Architecture},
  author = {Bing Qiu and Yvon Savaria and Meng Lu and Chunyan Wang and Claude Thibeault},
  year = {2002},
  url = {http://www.computer.org/proceedings/dft/1831/18310314abs.htm},
  tags = {modeling, architecture, routing},
  researchr = {https://researchr.org/publication/QiuSLWT02},
  cites = {0},
  citedby = {0},
  pages = {314-324},
  booktitle = {17th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2002), 6-8 November 2002, Vancouver, BC, Canada, Proceedings},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-1831-1},
}