Bruce Querbach, Rahul Khanna, Sudeep Puligundla, David Blankenbeckler, Joseph Crop, Patrick Yin Chiang. Architecture of a Reusable BIST Engine for Detection and Autocorrection of Memory Failures and for IO Debug, Validation, Link Training, and Power Optimization on 14-nm SoC. IEEE Design & Test of Computers, 33(1):59-67, 2016. [doi]
@article{QuerbachKPBCC16,
title = {Architecture of a Reusable BIST Engine for Detection and Autocorrection of Memory Failures and for IO Debug, Validation, Link Training, and Power Optimization on 14-nm SoC},
author = {Bruce Querbach and Rahul Khanna and Sudeep Puligundla and David Blankenbeckler and Joseph Crop and Patrick Yin Chiang},
year = {2016},
doi = {10.1109/MDAT.2015.2445053},
url = {http://dx.doi.org/10.1109/MDAT.2015.2445053},
researchr = {https://researchr.org/publication/QuerbachKPBCC16},
cites = {0},
citedby = {0},
journal = {IEEE Design & Test of Computers},
volume = {33},
number = {1},
pages = {59-67},
}