Design of INV/BUFF Logic Locking For Enhancing the Hardware Security

Naveenkumar R, N. M. Sivamangai, Napolean A, S. Sridevi Sathya Priya, S. V. Ashika. Design of INV/BUFF Logic Locking For Enhancing the Hardware Security. J. Electronic Testing, 39(2):141-153, April 2023. [doi]

@article{RSAPA23,
  title = {Design of INV/BUFF Logic Locking For Enhancing the Hardware Security},
  author = {Naveenkumar R and N. M. Sivamangai and Napolean A and S. Sridevi Sathya Priya and S. V. Ashika},
  year = {2023},
  month = {April},
  doi = {10.1007/s10836-023-06061-y},
  url = {https://doi.org/10.1007/s10836-023-06061-y},
  researchr = {https://researchr.org/publication/RSAPA23},
  cites = {0},
  citedby = {0},
  journal = {J. Electronic Testing},
  volume = {39},
  number = {2},
  pages = {141-153},
}