A 6-bit 6-GS/s 95mW background calibrated flash ADC with integrating preamplifiers and half-rate comparators in 32nm LP CMOS

Francesco Radice, Melchiorre Bruccoleri, Marcello Ganzerli, Giorgio Spelgatti, Davide Sanzogni, Massimo Pozzoni, Andrea Mazzanti. A 6-bit 6-GS/s 95mW background calibrated flash ADC with integrating preamplifiers and half-rate comparators in 32nm LP CMOS. In ESSCIRC 2013 - Proceedings of the 39th European Solid-State Circuits Conference, Bucharest, Romania, September 16-20, 2013. pages 129-132, IEEE, 2013. [doi]

Authors

Francesco Radice

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Melchiorre Bruccoleri

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Marcello Ganzerli

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Giorgio Spelgatti

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Davide Sanzogni

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Massimo Pozzoni

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Andrea Mazzanti

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