A 6-bit 6-GS/s 95mW background calibrated flash ADC with integrating preamplifiers and half-rate comparators in 32nm LP CMOS

Francesco Radice, Melchiorre Bruccoleri, Marcello Ganzerli, Giorgio Spelgatti, Davide Sanzogni, Massimo Pozzoni, Andrea Mazzanti. A 6-bit 6-GS/s 95mW background calibrated flash ADC with integrating preamplifiers and half-rate comparators in 32nm LP CMOS. In ESSCIRC 2013 - Proceedings of the 39th European Solid-State Circuits Conference, Bucharest, Romania, September 16-20, 2013. pages 129-132, IEEE, 2013. [doi]

@inproceedings{RadiceBGSSPM13,
  title = {A 6-bit 6-GS/s 95mW background calibrated flash ADC with integrating preamplifiers and half-rate comparators in 32nm LP CMOS},
  author = {Francesco Radice and Melchiorre Bruccoleri and Marcello Ganzerli and Giorgio Spelgatti and Davide Sanzogni and Massimo Pozzoni and Andrea Mazzanti},
  year = {2013},
  doi = {10.1109/ESSCIRC.2013.6649089},
  url = {https://doi.org/10.1109/ESSCIRC.2013.6649089},
  researchr = {https://researchr.org/publication/RadiceBGSSPM13},
  cites = {0},
  citedby = {0},
  pages = {129-132},
  booktitle = {ESSCIRC 2013 - Proceedings of the 39th European Solid-State Circuits Conference, Bucharest, Romania, September 16-20, 2013},
  publisher = {IEEE},
  isbn = {978-1-4799-0644-4},
}