Reduction of Register File Delay Due to Process Variability in VLIW Embedded Processors

Praveen Raghavan, José L. Ayala, David Atienza, Francky Catthoor, Giovanni De Micheli, Marisa López-Vallejo. Reduction of Register File Delay Due to Process Variability in VLIW Embedded Processors. In International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA. pages 121-124, IEEE, 2007. [doi]

Abstract

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