Bharath Raghavan, Delong Cui, Ullas Singh, Hassan Maarefi, Dave Pi, Anand Vasani, Zhi Huang, Afshin Momtaz, Jun Cao. A sub-2W 39.8-to-44.6Gb/s transmitter and receiver chipset with SFI-5.2 interface in 40nm CMOS. In 2013 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, ISSCC 2013, San Francisco, CA, USA, February 17-21, 2013. pages 32-33, IEEE, 2013. [doi]
Abstract is missing.