Models for Full-Chip Power Dissipation in Field Programmable Gate Arrays and the Impact of Subthreshold Leakage Current - researchr publication

researchr

You are not signed in
Sign in
Sign up

Arifur Rahman. Models for Full-Chip Power Dissipation in Field Programmable Gate Arrays and the Impact of Subthreshold Leakage Current. In Hamid R. Arabnia, Laurence Tianruo Yang, editors, Proceedings of the International Conference on VLSI, VLSI 03, June 23 - 26, 2003, Las Vegas, Nevada, USA. pages 97-106, CSREA Press, 2003.

Abstract is missing.

runs on WebDSL