Mohammed Ziaur Rahman. A Combined Arithmetic Logic Unit and Memory Element for the Design of a Parallel Computer. In Yang Xiang, Alfredo Cuzzocrea, Michael Hobbs, Wanlei Zhou, editors, Algorithms and Architectures for Parallel Processing - 11th International Conference, ICA3PP, Melbourne, Australia, October 24-26, 2011, Proceedings, Part I. Volume 7016 of Lecture Notes in Computer Science, pages 306-317, Springer, 2011. [doi]
Abstract is missing.