Rajesh Raina, Robert Bailey, Charles Njinda, Robert F. Molyneaux, Charlie Beh. Efficient Testing of Clock Regenerator Circuits in Scan Designs. In DAC. pages 95-100, 1997. [doi]
@inproceedings{RainaBNMB97,
title = {Efficient Testing of Clock Regenerator Circuits in Scan Designs},
author = {Rajesh Raina and Robert Bailey and Charles Njinda and Robert F. Molyneaux and Charlie Beh},
year = {1997},
doi = {10.1145/266021.266042},
url = {http://doi.acm.org/10.1145/266021.266042},
tags = {testing},
researchr = {https://researchr.org/publication/RainaBNMB97},
cites = {0},
citedby = {0},
pages = {95-100},
booktitle = {DAC},
}