Exploiting transistor-level reconfiguration to optimize combinational circuits

Michael Raitza, Akash Kumar 0001, Marcus Völp, Dennis Walter, Jens Trommer, Thomas Mikolajick, Walter M. Weber. Exploiting transistor-level reconfiguration to optimize combinational circuits. In David Atienza, Giorgio Di Natale, editors, Design, Automation & Test in Europe Conference & Exhibition, DATE 2017, Lausanne, Switzerland, March 27-31, 2017. pages 338-343, IEEE, 2017. [doi]

Abstract

Abstract is missing.