Process Variation Tolerant FinFET Based Robust Low Power SRAM Cell Design at 32 nm Technology

Balwinder Raj, Jatin Mitra, Deepak Kumar Bihani, V. Rangharajan, Ashok K. Saxena, Sudeb Dasgupta. Process Variation Tolerant FinFET Based Robust Low Power SRAM Cell Design at 32 nm Technology. J. Low Power Electronics, 7(2):163-171, 2011. [doi]

@article{RajMBRSD11,
  title = {Process Variation Tolerant FinFET Based Robust Low Power SRAM Cell Design at 32 nm Technology},
  author = {Balwinder Raj and Jatin Mitra and Deepak Kumar Bihani and V. Rangharajan and Ashok K. Saxena and Sudeb Dasgupta},
  year = {2011},
  doi = {10.1166/jolpe.2011.1125},
  url = {http://dx.doi.org/10.1166/jolpe.2011.1125},
  researchr = {https://researchr.org/publication/RajMBRSD11},
  cites = {0},
  citedby = {0},
  journal = {J. Low Power Electronics},
  volume = {7},
  number = {2},
  pages = {163-171},
}