A Modelling and Nonlinear Equalization Technique for a 20 Gb/s 0.77 pJ/b VCSEL Transmitter in 32 nm SOI CMOS

Mayank Raj, Manuel Monge, Azita Emami. A Modelling and Nonlinear Equalization Technique for a 20 Gb/s 0.77 pJ/b VCSEL Transmitter in 32 nm SOI CMOS. J. Solid-State Circuits, 51(8):1734-1743, 2016. [doi]

@article{RajME16,
  title = {A Modelling and Nonlinear Equalization Technique for a 20 Gb/s 0.77 pJ/b VCSEL Transmitter in 32 nm SOI CMOS},
  author = {Mayank Raj and Manuel Monge and Azita Emami},
  year = {2016},
  doi = {10.1109/JSSC.2016.2553040},
  url = {http://dx.doi.org/10.1109/JSSC.2016.2553040},
  researchr = {https://researchr.org/publication/RajME16},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {51},
  number = {8},
  pages = {1734-1743},
}