Parallel memristors: Improving variation tolerance in memristive digital circuits

Jeyavijayan Rajendran, Ramesh Karri, Garrett S. Rose. Parallel memristors: Improving variation tolerance in memristive digital circuits. In International Symposium on Circuits and Systems (ISCAS 2011), May 15-19 2011, Rio de Janeiro, Brazil. pages 2241-2244, IEEE, 2011. [doi]

@inproceedings{RajendranKR11,
  title = {Parallel memristors: Improving variation tolerance in memristive digital circuits},
  author = {Jeyavijayan Rajendran and Ramesh Karri and Garrett S. Rose},
  year = {2011},
  doi = {10.1109/ISCAS.2011.5938047},
  url = {http://dx.doi.org/10.1109/ISCAS.2011.5938047},
  researchr = {https://researchr.org/publication/RajendranKR11},
  cites = {0},
  citedby = {0},
  pages = {2241-2244},
  booktitle = {International Symposium on Circuits and Systems (ISCAS 2011), May 15-19 2011, Rio de Janeiro, Brazil},
  publisher = {IEEE},
}