A Design of 6-bit 125-MS/s SAR ADC in 0.13-µm MM/RF CMOS Process - researchr publication

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R. Rajendran, P. V. Ramakrishna. A Design of 6-bit 125-MS/s SAR ADC in 0.13-µm MM/RF CMOS Process. In International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012. pages 23-27, IEEE, 2012. [doi]

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