A Heuristic for Clock Selection in High-Level Synthesis

J. Ramanujam, Sandeep Deshpande, Jinpyo Hong, Mahmut T. Kandemir. A Heuristic for Clock Selection in High-Level Synthesis. In Proceedings of the ASPDAC 2002 / VLSI Design 2002, CD-ROM, 7-11 January 2002, Bangalore, India. pages 414-419, IEEE Computer Society, 2002. [doi]

Abstract

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