Pass Transistor-Based Pull-Up/Pull-Down Insertion Technique for Leakage Power Optimization in CMOS VLSI Circuits - researchr publication references

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V. Leela Rani, M. Madhavi Latha. Pass Transistor-Based Pull-Up/Pull-Down Insertion Technique for Leakage Power Optimization in CMOS VLSI Circuits. CSSP, 35(11):4139-4152, 2016. [doi]

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