Electrical Modeling and Characterization of Copper/Carbon Nanotubes in Tapered through Silicon Vias

Madhav Rao. Electrical Modeling and Characterization of Copper/Carbon Nanotubes in Tapered through Silicon Vias. In 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, VLSID 2017, Hyderabad, India, January 7-11, 2017. pages 366-371, IEEE Computer Society, 2017. [doi]

@inproceedings{Rao17-2,
  title = {Electrical Modeling and Characterization of Copper/Carbon Nanotubes in Tapered through Silicon Vias},
  author = {Madhav Rao},
  year = {2017},
  doi = {10.1109/VLSID.2017.87},
  url = {http://doi.ieeecomputersociety.org/10.1109/VLSID.2017.87},
  researchr = {https://researchr.org/publication/Rao17-2},
  cites = {0},
  citedby = {0},
  pages = {366-371},
  booktitle = {30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, VLSID 2017, Hyderabad, India, January 7-11, 2017},
  publisher = {IEEE Computer Society},
  isbn = {978-1-5090-5740-5},
}