Quantification of the likelihood of single event multiple transients in logic circuits in bulk CMOS technology

Nanditha P. Rao, Madhav P. Desai. Quantification of the likelihood of single event multiple transients in logic circuits in bulk CMOS technology. Microelectronics Journal, 72:86-99, 2018. [doi]

Authors

Nanditha P. Rao

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Madhav P. Desai

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