P. Srinivasa Rao, James Jacob. A Fast Two-level Logic Minimizer. In 11th International Conference on VLSI Design (VLSI Design 1991), 4-7 January 1998, Chennai, India. pages 528-533, IEEE Computer Society, 1998. [doi]
@inproceedings{RaoJ98,
title = {A Fast Two-level Logic Minimizer},
author = {P. Srinivasa Rao and James Jacob},
year = {1998},
doi = {10.1109/ICVD.1998.646660},
url = {http://doi.ieeecomputersociety.org/10.1109/ICVD.1998.646660},
tags = {logic},
researchr = {https://researchr.org/publication/RaoJ98},
cites = {0},
citedby = {0},
pages = {528-533},
booktitle = {11th International Conference on VLSI Design (VLSI Design 1991), 4-7 January 1998, Chennai, India},
publisher = {IEEE Computer Society},
}