Reconfigurable multiple scan-chains for reducing test application time of SOCs

Jiann-Chyi Rau, Chih-Lung Chien, Jia-Shing Ma. Reconfigurable multiple scan-chains for reducing test application time of SOCs. In International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan. pages 5846-5849, IEEE, 2005. [doi]

Abstract

Abstract is missing.