Inexact Signed Wallace Tree Multiplier Design Using Reversible Logic

Sithara Raveendran, Pranose J. Edavoor, Nithin Kumar Yernad Balachandra, M. H. Vasantha. Inexact Signed Wallace Tree Multiplier Design Using Reversible Logic. IEEE Access, 9:108119-108130, 2021. [doi]

References

No references recorded for this publication.

Cited by

No citations of this publication recorded.