Danilo Ravotto, Ernesto Sánchez, Matteo Sonza Reorda. A hardware accelerated framework for the generation of design validation programs for SMT processors. In Elena Gramatová, Zdenek Kotásek, Andreas Steininger, Heinrich Theodor Vierhaus, Horst Zimmermann, editors, 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2010, Vienna, Austria, April 14-16, 2010. pages 289-292, IEEE, 2010. [doi]
Abstract is missing.