Analyzing path delays for accelerated testing of logic chips - researchr publication authors

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Emily Ray, Barry P. Linder, Raphael Robertazzi, Kevin G. Stawiasz, Alan J. Weger, Emmanuel Yashchin, James H. Stathis, Peilin Song. Analyzing path delays for accelerated testing of logic chips. In IEEE International Reliability Physics Symposium, IRPS 2015, Monterey, CA, USA, April 19-23, 2015. pages 6, IEEE, 2015. [doi]

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