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Design of Energy Efficient and Low Delay Posit Multiplier

K. Lakshmi BhanuPrakash Reddy, Haripriya R. S, Keerthija Puli, Subba Ramkumar Reddy Annapalli, Vikramkumar Pudi. Design of Energy Efficient and Low Delay Posit Multiplier. In 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems, VLSID 2023, Hyderabad, India, January 8-12, 2023. pages 1-6, IEEE, 2023. [doi]

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