A Novel Low Power Error Detection Logic for Inexact Leading Zero Anticipator in Floating Point Units

B. Naveen Kumar Reddy, M. Chandra Sekhar, Sreehari Veeramachaneni, M. B. Srinivas. A Novel Low Power Error Detection Logic for Inexact Leading Zero Anticipator in Floating Point Units. In 2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems, Mumbai, India, January 5-9, 2014. pages 128-132, IEEE, 2014. [doi]

Abstract

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