Guillaume Renaud, Marc Margalef-Rovira, Manuel J. Barragan, Salvador Mir. Analysis of an efficient on-chip servo-loop technique for reduced-code static linearity test of pipeline ADCs. In 35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017. pages 1-6, IEEE, 2017. [doi]
@inproceedings{RenaudMBM17,
title = {Analysis of an efficient on-chip servo-loop technique for reduced-code static linearity test of pipeline ADCs},
author = {Guillaume Renaud and Marc Margalef-Rovira and Manuel J. Barragan and Salvador Mir},
year = {2017},
doi = {10.1109/VTS.2017.7928951},
url = {https://doi.org/10.1109/VTS.2017.7928951},
researchr = {https://researchr.org/publication/RenaudMBM17},
cites = {0},
citedby = {0},
pages = {1-6},
booktitle = {35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017},
publisher = {IEEE},
isbn = {978-1-5090-4482-5},
}