VLSI systolic array architecture for the lattice structure of the discrete wavelet transform - researchr publication

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Carlos E. Cabrera Reyes, Javier D. Bruguera. VLSI systolic array architecture for the lattice structure of the discrete wavelet transform. In IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings. pages 605-608, IEEE, 2000. [doi]

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